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Cadence Design Systems

Sr Application Engineer

Bengaluru · Mid Level

Older listing - lower visibility likelyVerified listingPosted 535d ago

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Skills required

3 listed
Production ScheduleDesign TechnologyPhysical Design
Production ScheduleDesign TechnologyPhysical Design

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Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

JD for Virtuoso Layout req
Your role will be to meet customers/prospects and identify & qualify the opportunities, work out agreeable, equally importantly achievable, evaluation criteria, run through the evaluation and convert the opportunities into business and help customers to deploy the tool and get it running into production at the earliest. It requires a very good understanding of customer flow and a good analytical ability to resolve issues impacting production schedule. Hands–on knowledge of Advance Node layout and design rules would be a plus.

The role demands a close interaction with R&D and Product Engineering team for implementation of new features and bug fixes.

As the job requires an extensive interaction with customers for issue resolution and identifying opportunities to proliferate Cadence technologies, at the same time a closer interaction with R&D and other stakeholders, it demands an excellent customer and communication skills, and the leadership qualities.

This position requires solid understanding of IC design technology and foundry process/methodology in analog layouts. It is essential to have a very good understanding of analog layout design fundamentals, advance node virtuoso techfile constraints and in-depth knowledge and hands-on experience on writing skill scripts to perform various layout automation tasks. The candidate should have knowledge of complete analog back-end flow from top level floorplanning down to complex block level layouts, physical verification, extraction, EMIR analysis etc, with proficiency in Cadence layout tools specifically Virtuoso with advance node exposure. Prior Design experience using Cadence CustomIC Physical Design tools (Virtuoso) and flows including chip integration and signoff is an added advantage.

- B.Tech or equivalent with 3 to 5 years of relevant experience.
 

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Two ways in

Applicants who checked fit first are 3.1× more likely to hear back

Your match scoreFree · sign in
86Overall
64Skills
97Experience

Your score for this role already exists

ASAI compared this JD against 41 signals - skills, seniority, domain, stack overlap etc. Add a resume and it unlocks in about 30 seconds.

Always free · no credit card · 1 tap with Google

Free · no signup

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Why people use ASAI

Someone shared one job with you. ASAI keeps finding the rest.

  • Scored, not searched. Every role ranked against your actual profile.

  • Alerts as often as hourly. Reach new roles while the pile is still small.

  • Skill gaps, spelled out. See exactly which requirements you don't meet yet.

  • Verified jobs, only. Say no to ghost jobs. Your time deserves respect.

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