Senior Technical Architect

Job Summary

We are building a team to take Image Signal Processing (ISP) algorithms from research/reference form into shippable, production-quality embedded software for camera-enabled edge-AI microcontroller platforms. This role owns the image pipeline between the camera sensor and downstream vision/display consumers — including sensor control, image-quality tuning, and driver/pipeline integration — converted into optimized embedded C and adapted per target hardware platform and market.

Key Responsibilities

• Convert ISP algorithm reference implementations (e.g., MATLAB/prototype models) into optimized, production-quality embedded C.
• Develop, integrate, and maintain ISP pipeline software: auto-exposure (AE), auto-white-balance (AWB), auto-focus (AF), noise reduction, HDR, lens/color/gamma correction, and demosaicing.
• Perform platform-specific adaptation: partition ISP processing across a heterogeneous compute architecture where heavy pixel-processing computation is offloaded to a DSP, optimizing for low power and cost.
• Perform market-specific adaptation: tune image quality for different sensor modules, lighting environments, and customer/market requirements.
• Bring up and tune camera sensor drivers and ISP configurations for new sensor modules, ensuring correct image quality across lighting and use-case conditions.
• Work with camera interface standards (e.g., MIPI CSI-2) and sensor control protocols (I2C/SPI) to configure and validate sensor timing, exposure, and register settings.
• Collaborate with the upstream algorithm/tuning team to translate tuning requirements into pipeline parameters and validate against objective/subjective image-quality benchmarks.
• Optimize ISP software for real-time throughput, memory bandwidth, and power constraints on embedded/edge hardware.
• Integrate ISP output with downstream consumers such as on-device computer-vision inference pipelines or display/HMI subsystems.
• Debug image artifacts and pipeline issues using test charts, image analysis tools, and hardware debuggers.
• Document pipeline architecture, tuning parameters, and validation results.

Skill Requirements

• Strong C/C++ programming experience in embedded or camera/imaging software.
• Solid understanding of image signal processing fundamentals: Bayer/demosaicing, auto-exposure/auto-white-balance/auto-focus (3A) algorithms, noise reduction, gamma/color correction, HDR.
• Experience with camera sensor bring-up, sensor driver integration, and camera interface protocols (e.g., MIPI CSI-2, I2C/SPI sensor control).
• Familiarity with embedded/RTOS-based platforms and real-time constraints typical of camera pipelines.
• Experience with image-quality evaluation methods and tools (test charts, objective IQ metrics).
• Comfortable with hardware bring-up and debugging (oscilloscopes, logic analyzers, JTAG/SWD).
• Version control (Git) and structured embedded software development practices.
• Development of unit-tests and system-tests
• Scripting (Python) for automated testing
• ARM, DSP programming experience

Other Requirements

• Experience feeding ISP output into on-device computer-vision or ML inference pipelines.
• Familiarity with low-power/always-on camera architectures for battery-operated or edge-AI devices.
• Exposure to MIPI DSI/display pipelines alongside CSI camera input.
• Scripting (Python) for automated image-quality test and analysis tooling.
• Prior experience in security cameras, smart-home imaging, automotive vision, or industrial imaging products.

Bachelor’s or Master’s degree in Electronics, Computer Engineering, Computer Science, or related field.