Practice Director
Bengaluru · Executive
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Job description
Job Summary
Lead and scale the organization's Design-for-Test (DFT/DFx) competency across all semiconductor engagements, including SoC Turnkey Programs, Managed Services, Outcome-Based Projects, and T&M engagements.
The role owns the overall DFT capability strategy, technical roadmap, resource pyramid, competency development, delivery excellence, customer confidence, and business growth while ensuring the organization remains competitive in advanced-node and next-generation semiconductor technologies
1. Capability Strategy & Organizational Leadership
- Define the long-term DFT/DFx capability vision aligned with business growth objectives.
- Build and manage a world-class DFT organization across geographies.
- Develop competency roadmaps covering:
- Scan
- ATPG
- MBIST
- LBIST
- IJTAG
- SSN
- Functional Safety
- DFX Validation
- Silicon Debug
- Yield Enhancement
- Advanced Packaging Test
- Chiplet Test Methodologies
- Establish Centers of Excellence (CoE) for emerging technologies.
- Drive annual capability investment plans.
2. Turnkey Program Governance
Serve as the DFT executive owner across multiple turnkey programs.
Responsibilities
- Participate in program qualification reviews.
- Support effort estimation and technical due diligence.
- Review DFT architecture and execution strategies.
- Govern delivery health across programs.
- Intervene in critical technical escalations.
- Drive milestone and sign-off reviews.
- Track delivery metrics across all turnkey programs.
Accountable For
- Tapeout success
- DFT quality
- Coverage achievement
- Program predictability
- Customer satisfaction
3. Technical Authority and Solution Leadership
- Act as the highest technical escalation point for DFT.
- Review complex SoC DFT architectures.
- Define reusable methodologies and best practices.
- Approve enterprise-wide DFT signoff guidelines.
- Drive adoption of new DFT technologies.
- Evaluate emerging EDA tools and methodologies.
Key Responsibilities
Typical Areas
- Advanced Scan Architectures
- Test Compression
- LBIST
- Safety Diagnostics
- Automotive DFT
- Chiplet Testing
- Heterogeneous Integration
- Silicon Lifecycle Management
4. Business Growth & Pre-Sales
Partner with sales, account, and practice leadership teams.
Responsibilities
- Participate in customer workshops and executive discussions.
- Support RFI/RFP responses.
- Create DFT service offerings.
- Build differentiated DFT value propositions.
- Develop turnkey execution models.
Ownership
- DFT revenue growth
- New logo opportunities
- Capability-led opportunities
- Account mining initiatives
- Managed services expansion
5. Workforce & Resource Management
Own competency health across all engagements.
Responsibilities
- Workforce planning.
- Demand forecasting.
- Bench management.
- Leadership pipeline creation.
- Skill inventory management.
- Strategic hiring.
Typical Talent Categories
- Architects
- SMEs
- Technical Leads
- Senior Engineers
- Freshers
- Contractors
Success Measures
- Billability
- Utilization
- Pyramid health
- Lead-to-engineer ratio
- Fulfillment efficiency
6. Competency Development & Training
Drive continuous skill development.
Establish Learning Programs For
- DFT Fundamentals
- Advanced ATPG
- MBIST Architecture
- Functional Safety
- Automotive DFT
- IJTAG
- Silicon Debug
- DFX Verification
- Post Silicon Validation
Skill Requirements
Leadership Expectations
- Develop future architects.
- Create certification frameworks.
- Establish mentoring programs.
- Drive technical communities and guilds.
7. Delivery Excellence & Quality
Define and institutionalize DFT delivery standards.
Create Frameworks For
- DFT Design Reviews
- DFT Architecture Reviews
- Signoff Checklists
- Metrics Dashboards
- Quality Gates
- Audit Mechanisms
Drive
- Reuse frameworks
- Automation
- Productivity improvements
- Coverage closure methodologies
- Root cause analysis
8. Customer & Executive Stakeholder Management
Interface directly with:
External
- Customer VP Engineering
- Design Directors
- SoC Architects
- Test Engineering Teams
Internal
- Practice Heads
- Delivery Heads
- Program Directors
- Capability Leaders
- Sales Leaders
Act as the face of the DFT organization for strategic accounts.
9. Innovation & Differentiation
Drive strategic investments in:
- AI-assisted DFT flows
- DFT automation
- Coverage analytics
- Silicon diagnosis automation
- Test cost optimization
- Digital engineering accelerators
Build reusable IPs and frameworks that improve project productivity and margins.
P&L and Business Accountability
The Capability Head should typically be responsible for:
- Competency Revenue
- Utilization
- Gross Margin Improvement
- Fulfillment Metrics
- Hiring Targets
- Training ROI
- Customer Satisfaction
- Delivery Quality
- Attrition Control
- Leadership Development
Other Requirements
Desired Experience
Education
- B.E./B.Tech/M.E./M.Tech in Electronics, VLSI, Microelectronics or equivalent.
Experience
- 18-25+ years in Semiconductor Design Services.
- 12+ years in DFT/DFx.
- Experience leading large global teams.
- Experience managing multiple SoC programs.
- Strong customer-facing leadership experience.
- Proven track record in turnkey execution.
Technical Expertise
Deep understanding of:
- Scan
- ATPG
- MBIST
- LBIST
- IJTAG
- Boundary Scan
- DFX Validation
- Functional Safety
- STA
- Physical Design Interfaces
- Silicon Bring-up
- Yield Improvement
Advanced node experience:
- 3nm/5nm/7nm/16nm/28nm
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