Bengaluru · Mid Level
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Skyworks Bengaluru, KA, IND design center has leading R&D and product development capabilities. Our team provides many opportunities to learn from various circuit level designs to system module level for cell phone applications. You’ll be paired with an engineer in Irvine, CA, USA, to support you as an integral part of the team. Working and living in Bengaluru provides a wonderful lifestyle in a vibrant city which is one of the leading tech cities in India.
Seeking an early-career analog design engineer to develop and verify mixed-signal controllers for custom RF integrated circuits. This role will be part of a design group enabling the next generation of wireless technology through the development of custom RF solutions for mobile devices. Candidate will work closely withand support our US based analog design team. The role will focus on integrating internal IP into custom controllers and running analog IP block and full chipverification. Candidate will gain experience in multiple IC technologies. Responsibilities will also include detailed documentation and automation development +methodology improvement.
- Perform chip top level verification of RF integrated circuit products
- Integrate Skyworks IP in RF integrated circuit controllers to meet customer requirements
- Collaborate with RF, digital, layout, and systems engineers
- Communicate technical results clearly through design reviews, documentation, presentations
- Develop and maintain scripts, utilities, and automation flows for IC design, simulation, verification, and documentation tasks
- Review layouts and provide guidance on device matching, parasitics, isolation, and die-size tradeoffs
- Maintain effective collaboration by ensuring adequate overlap with the US team and attending off-hours meetings when project needs require
- BSEE + 3 years work relevant work experience
- MS or PhD preferred
- Demonstrated Analog IC design experience
- Proficient with Cadence IC design tools
- Solid understanding of general analog circuits such as bias, bandgap, LDO, opamp, charge pump etc.
- Strong understanding of silicon fabrication and how it affects the device physics, device model, and circuit performance
- Layout experience using Cadence flow, including LVS and DRC. Ability to work with CAD engineers and provide guidance on analog layouts
- Excellent communication and presentation skills
- Knowledge of RF design concepts and circuits
- Experienced in implementing on-chip ESD protection strategies for HBM/MM/CDM on IC
- Demonstrated experience debugging, resolving and applying techniques to mitigate analog signal noise coupling and optimum layout for performance, and die size trade off
- Experience with a scripting or coding language (Python, Perl, C, C++, etc.)
- Experience working with serial data protocols (I2C, UART, SPI, MIPI)
- Experience with digital design/verification languages and tools (Verilog, VHDL, SystemVerilog, synthesis, etc.)
- Understanding of analog behavioral modeling techniques (VerilogA, VerilogAMS, or Real Number Modeling)
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