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Design Verification Engineer

Pune · Mid Level

Older listing - lower visibility likelyVerified listingPosted 251d ago

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Skills required

7 listed
Design VerificationDesign SpecificationsDigital DesignSystemVerilog (Direct Programming Interface)Python (Programming Language)Perl (Programming Language)Tcl (Programming Language)
Design VerificationDesign SpecificationsDigital DesignSystemVerilog (Direct Programming Interface)Python (Programming Language)

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Job description

Design Verification Engineer

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Job Summary

As a Design Verification Engineer at NXP Semiconductors, you will play a crucial role in ensuring the functional correctness and quality of our cutting-edge semiconductor designs. You will be responsible for developing and executing comprehensive verification plans to validate complex digital circuits, contributing to the delivery of robust and reliable products.

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Job Responsibilities

* Develop and implement efficient and comprehensive verification environments and test benches using industry-standard methodologies (e.g., UVM, SystemVerilog).
* Create detailed verification plans based on design specifications, identifying key functionalities and potential corner cases.
* Develop, execute, and debug test cases to thoroughly verify the design against its specifications.
* Analyze simulation results, identify discrepancies, and work closely with design engineers to resolve issues.
* Develop and maintain verification collateral, including assertions, functional coverage models, and verification scripts.
* Participate in verification reviews, contributing to the improvement of verification methodologies and processes.
* Collaborate with design, architecture, and software teams throughout the product development lifecycle.
* Contribute to the continuous improvement of verification flows and tools.
* Document verification strategies, test plans, and results effectively.

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Job Qualifications

* Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
* Proven experience (typically 2+ years) in digital IC design verification.
* Strong proficiency in SystemVerilog and UVM (Universal Verification Methodology).
* Experience with industry-standard simulation tools (e.g., Questa, VCS, Xcelium).
* Solid understanding of digital design principles and architectures.
* Experience with scripting languages such as Python, Perl, or Tcl.
* Familiarity with functional coverage driven verification and assertion-based verification.
* Excellent problem-solving skills and attention to detail.
* Strong communication and interpersonal skills, with the ability to work effectively in a team environment.
* Fluency in English, both written and spoken.


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Applicants who checked fit first are 3.1× more likely to hear back

Your match scoreFree · sign in
86Overall
64Skills
97Experience

Your score for this role already exists

ASAI compared this JD against 41 signals - skills, seniority, domain, stack overlap etc. Add a resume and it unlocks in about 30 seconds.

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  • Verified jobs, only. Say no to ghost jobs. Your time deserves respect.

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