AMS Spice Verification:

Requirements:

• • Education & Experience:
    B. Tech/M. Tech with 5+ years of industry experience in Analog/Mixed-Signal (AMS) SPICE simulation at block, subsystem, and chip-top levels.
  • Technical Expertise:
    Strong understanding of analog design fundamentals and mixed-signal architectures, with exposure to complex SoC integrations involving Power Management, PLL/Synthesizers, ADC/DAC, Bandgap references, Oscillators/Clocking, SerDes, and related digital control systems.
  • AMS Verification & Simulation:
    Proven experience in verification planning, AMS SPICE testbench development, and debugging complex convergence issues.
  • EDA Tools Proficiency:
    Hands-on experience with Cadence Virtuoso for schematic capture and waveform analysis tools such as SimVision/Verisium.
  • Simulation Tools:
    Expertise in SPICE/Fast-SPICE simulators (Spectre, UltraSim, APS, XPS) and digital simulators (Cadence Xcelium/DMSO).
  • Test Development:
    Experience in developing robust, self-checking AMS SPICE testcases.
  • Debug & Optimization Skills:
    Strong track record in resolving complex AMS simulation challenges, including environment/setup issues, runtime optimization, convergence at AMS boundaries, analog-digital integration, loading, and stability concerns.
  • Collaboration:
    Ability to work effectively with cross-functional teams, including system architects, analog/digital design, and DV teams.
  • Learning Agility & Problem Solving:
    Quick learner with strong analytical and problem-solving capabilities.

Personal Attributes:
Self-motivated, proactive, and enthusiastic team player

Skills Required

AMS Verification,Spice Simulation,Mixed Signal,Ams Verification Engineer,Verilog Ams,RNM

Role

Under direct supervision, performs engineering work and applied research, development, and design of new Integrated Chips. Work includes Architectural Design, Logic Design, Circuit Design, Physical Design, Verification, Fabrication, Packaging of Chips.

Designation

Associate